News SUTD researchers develop a novel reconfigurable technology

Developing energy-efficient high-performance computing devices, that is, devices that not only consume less power but also compute information quickly, is a key goal of edge computing research. Combining memory components and cells that perform shift register operations is a potential way to achieve this goal.

Most computing devices consist of physically separate memory components and processing units. However, to greatly simplify these devices and reduce their power consumption, a device has been developed that can efficiently perform both functions – an in-memory shift register architecture.

Traditional memory shift register architectures have limitations, although some of them have shown promising results. Limitations include the use of many devices and the requirement to convert resistance to electrical signals.

Researchers at the Singapore University of Technology and Design (SUTD) have developed a new reconfigurable shift register memory architecture based on phase-change alloys, materials that reversibly switch between glassy amorphous and ordered crystalline states.Their device acts as both a reconfigurable memory component and a programmable shift register, and has been published in advanced intelligent system.

The term “material (M) state-based shift register” is used to describe the shift register memory device developed by the researchers. Four material states of phase-change materials, namely amorphous, fully crystalline, partially crystalline, and initial states (representing different shift register/memory modes) were used to operate the device.

The device can be switched to perform shift register or memory functions and is easy to program due to its special design. The researchers showed that the device performed impressively for both functions in preliminary tests.

“When operating as a memory, the device can switch from the disordered glass state to the crystalline state with a 1.9 ns pulse, which is about one-third shorter than existing devices based on nitrogen-doped germanium antimony tellurium layers; and exhibits a 2 pJ reset energy.When used as a shift register, the device can switch between serial-in-serial-out mode and serial-in-parallel-out mode, has a single cell, and exhibits many levels of resistance, which It hasn’t been shown before,” said Assistant Professor Desmond Loke of SUTD, the lead researcher of the study.

In order to greatly reduce power consumption, the new memory shift register architecture proposed by the research team can be used to design various high-performance electronic systems in the future. M-state-based shift registers can be applied to a variety of operational schemes and computations, although for the purposes of this study, the researchers have demonstrated that these devices can successfully perform shift register operations.

Other researchers involved in this work include Shao-Xiang Go, Qiang Wang, Natasa Bajalovic from SUTD, Taehoon Lee from Cambridge University and Kejie Huang from Zhejiang University.